NanoScienceWorks

Description

It is becoming increasingly clear that the two-dimensional layout of devices on computer chips is starting to hinder the development of high-performance computer systems. Three-dimensional structures will be needed to provide the performance required to implement computationally intensive tasks. 3-D Nanoelectronic Computer Architecture and Implementation reviews the state of the art in nanoelectronic device design and fabrication and discusses the architectural aspects of 3-D designs, including the possible use of molecular wiring and carbon nanotube interconnections. This is a valuable reference for those involved in the design and development of nanoelectronic devices and technology.

Table of Contents

Introduction. 3-D Structures. Overview of 3-D Systems and Thermal Considerations. Nanolectronic Devices. Molecular Electronics. Nanoimprint Lithography. Carbon Nanotubes Interconnects. Polymer-Based Wires. Discotic Liquid Crystals. Scaffolding of Discotic Liquid Crystals. Through-Chip Connections. Fault-Tolerance and Ultimate Physical Limits of Nanocomputation.

Contributors

Editor 1 Crawley, D., University College London, UK Editor 2 Nikolic, K., University College London, UK Editor 3 Forshaw, M., University College London, UK

Features

• - Documents the latest advances in device fabrication
• - Explores the recent trend toward the design of 3D chip layouts
• - Details the advantages of 3D designs in meeting the system requirements of computationally intensive tasks
• - Covers state-of-the-art technologies, including carbon nanotube interconnections, nanoimprint lithography, polymer-based wires, discotic liquid crystals, and through-chip connections
• - Considers the ultimate physical limits of nanocomputation

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