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Researchers Marry Nanowires, Silicon for ICs
Harvard University researchers, working with several leading German universities, have developed a new technique for fabricating nanowire photonic and electronic integrated circuits. Finding may yield low-cost, scalable nanowire use in photonics and ICs.
Federico Capasso and Mariano Zimmler of the Harvard School of Engineering and Applied Sciences.
While semiconductor nanowires can be easily produced in large quantities, assembling these nanowire components into functional circuits has posed a major challenge. The researchers incorporated “spin-on glass” technology, now used in today’s manufacturing process for silicon integrated circuits and photolithography, which transfers a circuit pattern onto a substrate with light. The combination,the team showed, produces a reproducible, high-volume, and low-cost fabrication method for integrating nanowire devices directly onto silicon.
The approach allowed the researchers to side-step one of the trickiest aspects of using nanowires in circuitry – nanowire placement. "Because our fabrication technique is independent of the geometrical arrangement of the nanowires on the substrate, we envision further combining the process with one of the several methods already developed for the controlled placement and alignment of nanowires over large areas," said Federico Capasso, a Harvard graduate student working on the project. "We believe the marriage of these processes will soon provide the necessary control to enable integrated nanowire photonic circuits in a standard manufacturing setting."
To demonstrate the potential scalability of their technique, the team fabricated hundreds of nanoscale ultraviolet light-emitting diodes by using zinc oxide nanowires on a silicon wafer. More broadly, because nanowires can be made of materials commonly used in electronics and photonics, they hold great promise for integrating efficient light emitters, from ultraviolet to infrared, with silicon technology. The team plans to further refine their novel method with an aim towards electrically contacting nanowires over entire wafers.
Nanowire Circuitry: Structure and Placement
By the way, the structure of the team's nanowire devices is based on sandwich geometry: a nanowire is placed between the highly conductive substrate, which functions as a common bottom contact, and a top metallic contact, using spin-on glass as a spacer layer to prevent the metal contact from shorting to the substrate.
As a result current can be uniformly injected along the length of the nanowires. These devices can then function as light-emitting diodes, with the color of light determined by the type of semiconductor nanowire used.
"Such an advance could lead to the development of a completely new class of integrated circuits, such as large arrays of ultra-small nanoscale lasers that could be designed as high-density optical interconnects or be used for on-chip chemical sensing," said Prof. Carsten Ronning of the University of Jena (Germany).
The team's co-authors are postdoctoral fellow Wei Yi and Venkatesh Narayanamurti, Dean of Harvard's School of Engineering and Applied Sciences; graduate student Daniel Stichtenoth, University of Gottingham; and postdoctoral fellow Tobias Voss, University of Bremen.
The research was supported by the National Science Foundation (NSF) and the German Research Foundation. The Harvard-based National Science Foundation Nanoscale Science and Engineering Center (NSEC) and the Center for Nanoscale Systems (CNS), also supported the work. The researchers have filed for U.S. patents covering their invention.
Work was also spearheaded by graduate student Mariano Zimmler and, Robert L. Wallace Professor of Applied Physics and Vinton Hayes Senior Research Fellow in Electrical Engineering, both of Harvard's School of Engineering and Applied Sciences (SEAS), and, the findings will be published in Nano Letters
The approach allowed the researchers to side-step one of the trickiest aspects of using nanowires in circuitry – nanowire placement. "Because our fabrication technique is independent of the geometrical arrangement of the nanowires on the substrate, we envision further combining the process with one of the several methods already developed for the controlled placement and alignment of nanowires over large areas," said Federico Capasso, a Harvard graduate student working on the project. "We believe the marriage of these processes will soon provide the necessary control to enable integrated nanowire photonic circuits in a standard manufacturing setting."
To demonstrate the potential scalability of their technique, the team fabricated hundreds of nanoscale ultraviolet light-emitting diodes by using zinc oxide nanowires on a silicon wafer. More broadly, because nanowires can be made of materials commonly used in electronics and photonics, they hold great promise for integrating efficient light emitters, from ultraviolet to infrared, with silicon technology. The team plans to further refine their novel method with an aim towards electrically contacting nanowires over entire wafers.
Nanowire Circuitry: Structure and Placement
By the way, the structure of the team's nanowire devices is based on sandwich geometry: a nanowire is placed between the highly conductive substrate, which functions as a common bottom contact, and a top metallic contact, using spin-on glass as a spacer layer to prevent the metal contact from shorting to the substrate.
As a result current can be uniformly injected along the length of the nanowires. These devices can then function as light-emitting diodes, with the color of light determined by the type of semiconductor nanowire used.
"Such an advance could lead to the development of a completely new class of integrated circuits, such as large arrays of ultra-small nanoscale lasers that could be designed as high-density optical interconnects or be used for on-chip chemical sensing," said Prof. Carsten Ronning of the University of Jena (Germany).
The team's co-authors are postdoctoral fellow Wei Yi and Venkatesh Narayanamurti, Dean of Harvard's School of Engineering and Applied Sciences; graduate student Daniel Stichtenoth, University of Gottingham; and postdoctoral fellow Tobias Voss, University of Bremen.
The research was supported by the National Science Foundation (NSF) and the German Research Foundation. The Harvard-based National Science Foundation Nanoscale Science and Engineering Center (NSEC) and the Center for Nanoscale Systems (CNS), also supported the work. The researchers have filed for U.S. patents covering their invention.
Work was also spearheaded by graduate student Mariano Zimmler and, Robert L. Wallace Professor of Applied Physics and Vinton Hayes Senior Research Fellow in Electrical Engineering, both of Harvard's School of Engineering and Applied Sciences (SEAS), and, the findings will be published in Nano Letters